Ask the Experts
March 16, 2021 - Updated
April 29, 2015 - Originally Posted

QFN Test Failures Caused by Flux

We have a PCBA with a QFN44. We use a no-clean flux. We have encountered many test failures during testing. A test engineer claims that the failures are due to flux residue between terminations that affects the capacitance at the joints. Is this a valid claim?


Expert Panel Responses

Yes. If the flux was not adequately activated there could be some leakage current.

Kay Parker
Technical Support Engineer
Indium Corporation
Kay Parker is a Technical Support Engineer based at Indium Corporation's headquarters in Clinton, N.Y. In this role she provides guidance and recommendations to customers related to process steps, equipment, techniques, and materials. She is also responsible for servicing the company's existing accounts and retaining new business.

This is most certainly a valid claim. The issue with processing QFNs, and other bottom terminated components, is the amount of standoff after reflow. If your QFN uses a solid ground pad on average you will see somewhere between 1-2 mil clearance which is insufficient to allow gasses to exhaust and/or allow any cleaning solution to fully penetrate under the part and remove the flux residues.

We have seen this for over a decade with different companies chasing functional and field failures.

The best way we have seen to increase the clearance is to change your pad design to incorporate a window pane type pad. This creates avenues for gasses to escape, or for saponified wash solution to fully clean around the outer perimeter.

This is a very well-known issue in the industry and you can find several papers on this topic on the internet.

Eric Camden
Lead Investigator
Foresite, Inc
Eric has been in the electronics industry for over 14 years and manages the C3 technical user group, Failure Analysis project management, Rescue Cleaning Division and is one of three Lead Investigators at Foresite.

Great question! You have learned the hard way that "No Clean" does not entirely mean "do not clean". The process for which a part should be cleaned, or not cleaned, should not be predicated on the marketing materials from a solder manufacturing company or one of its sales agents.

The end-user must make this decision on their own accord and they should rely on their own test data to see if an assembly is actually possible to "not be cleaned". It will require destructive testing of several boards with these flat packs.

Of course, I have been in the "cleaning business" for decades, so I may be a bit biased, but in my opinion (as an engineer who appreciates clean surfaces for bonding, coating, high-reliability), I would absolutely always clean a soldered surface.

Dense packages, such as BGAs and QFNs require the use of a chemistry that can do two things:

1) penetrate under the package and around the bond sites in the small gap that it allows (this typically eliminates water-based products because their molecules are too large) and

2) solubilize the flux and ionics and THEN come out from under the surface so the contamination is totally removed.

The first requirement is not so difficult with low surface tension hydrocarbons or hot vapor degreasing solvents, but the second requirement is more challenging. The solvent / condensed vapor must be able to be flushed out from under the component while that solvent chemistry also contains the solubilized flux.

This is not trivial, yet few chemistry companies address it. The solvent chemistry with the solubilized flux has much different properties than the solvent chemistry by itself. Changes in density, surface tension, and lack of sufficient quantity of solvent, can cause the solubilized flux to get lodged under the components, between bond sites, and not be removed which will shorten the life / reliability of the assembly.

This is where the old technology of those centrifugal spinners (used to be called MicroCels; I do not represent them) exceeded. Because they use centrifugal force to force out the solvent chemistry with the solubilized flux. That process has always seemed exceptional, yet the throughput is low.

If it were my assembly with a QFN, I would get a vapor cleaning machine (vapor degreaser), expose the boards to either NPB or a Trans, DCE solvent blend, vapor for about 20 seconds, then immerse them in the clean immersion tank for about 2 minutes, rotating the parts or components in the clean fluid, or increasing the immersion tank filtration mass flow rate until an effective flushing of the solvent chemistry with solubilized flux underneath the components is removed.

Rick Perkins
Chem Logic
Rick Perkins is a chemical engineer with more than 33 years of Materials & Processes experience. He has worked with Honeywell Aerospace in high-reliability manufacturing, as well as with several oil-field manufacturing companies. He also has a good understanding of environmental, health, and safety regulations.

This is a correct statement.

We have been reporting on this failure mechanism for 10 years. The QFN is pulled to tight to the board surface and the flux residue does not have a chance to release all the carrier and vent properly because the QFN is now 0.5 mil off the board surface trapping the flux under the component and leaving a gooey flux residue that over time will continue to absorb moisture and create leakage paths and parasitic circuits.

If you would like to discuss our fix for this problem we would be happy to discuss it.

Terry Munson
President/Senior Technical Consultant
Mr. Munson, President and Founder of Foresite, has extensive electronics industry experience applying Ion Chromatography analytical techniques to a wide spectrum of manufacturing applications.

The first question is whether or not the failure is a bridge between two adjacent I.O. s, or an open circuit at one or more I.O.

The bridging could come from a misalignment between the stencil aperture and the pad, paste that has slumped.An open could be from insufficient solder paste deposit volume, or a non-wet open from package warpage during reflow.

If there is reflowed solder at the junction of the device and the pad, it must have been subjected to sufficient heat to melt. The flux surrounding the spheres was also subjected to heat. It is highly unlikely that no-clean flux would retain sufficient ionic material after this event.

A dye and pry would be a good idea to determine the failure mode.

Mitch Holtzer
Director of Reclaim Business
Alpha Assembly Solutions
I've been in the soldering materials/applications industry for 25 years. Since joining Alpha, Ive been the global product manager for preforms, wave soldering flux, solder paste and more recently the Director of the soldering materials reclaim business.

This is highly unlikely, but is possible never say never, especially if using an ROM1 Paste or even ROM0 Classification. Its more than likely some paste has bled out underneath the Stencil due to poor gasket or inadequate board support and reduced the gap causing poor insulation resistance.

Obviously very difficult to tell underneath a QFN and once removed will more than likely remove the evidence of bleed. Run a few boards and check the underside of the Stencil for bleed prior to cleaning to rule this out. Poor SIR or Capacitance can also be an issue of HASL finish PCBs as well. Worth checking the solder finish and also the QFN to start with underneath a Microscope make sure no damage to resist defined pads.

Greg York
Technical Sales Manager
BLT Circuit Services Ltd
Greg York has over thirty two years of service in Electronics industry. York has installed over 600 Lead Free Lines in Europe with Solder and flux systems as well as Technical Support on SMT lines and trouble shooting.

No clean flux residues have the potential to cause a capacitance issue. There are many conductive ingredients used in no clean fluxes, and in an ideal world these are encapsulated by the rosins and other non-conductive ingredients.

We do not always build electronics in an ideal world, and consequently encapsulation is not perfect. Solder balling can also lead to capacitance issues. Some solder pastes are better than others in terms of potential solder balling. If you have the ability to inspect the flux pools with X-ray, you could spot a solder balling issue. Solder balling can typically be addressed through reflow profile modifications.

Tony Lentz
Field Applications
FCT Assembly
Tony has worked in the electronics industry since 1994. He worked as a process engineer at a circuit board manufacturer for 5 years. Since 1999, Tony has worked for FCT Companies as a laboratory manager, facility manager, and most recently a field application engineer. He has extensive experience doing research and development, quality control, and technical service with products used to manufacture and assemble printed circuit boards. He holds B.S. and M.B.S. degrees in Chemistry.

The test engineer is probably right. There had been studies on the effects of no-clean flux residues on RF assemblies. When the flux is trapped under a component and dependent on component's function, it could change the capacitance of the PCB layer due to the flux's dielectric properties.

Edithel Marietti
Senior Manufacturing Engineer
Northrop Grumman
Edithel is a chemical engineer with 20 year experience in manufacturing & process development for electronic contract manufacturers in US as well as some major OEM's. Involved in SMT, Reflow, Wave and other assembly operations entailing conformal coating and robotics.

There are many inquiries regarding residual flux beneath surface mount component and from my perspective, flux qualification and thermal profiles, are the main culprits. The flux has to be evaluated to verify it will not be deleterious to the product if not removed after processing.

Secondly all the fluxes must reach soldering temperature to volatize off the active materials in the flux. Although reflow temperature are experienced outside the periphery of the component it may not be the case beneath the component. Hence this is where the problems begin as this flux is still active.

Leo Lambert
Vice President, Technical Director
EPTAC Corporation
At EPTAC Corporation, Mr. Lambert oversees content of course offerings, IPC Certification programs and provides customers with expert consultation in electronics manufacturing, including RoHS/WEEE and lead free issues. Leo is also the IPC General Chairman for the Assembly/Joining Process Committee.


Dr. Craig D. Hillman
CEO & Managing Partner
DfR Solutions
Dr. Hillman's specialties include best practices in Design for Reliability, strategies for transitioning to Pb-free, supplier qualification, passive component technology and printed board failure mechanisms.

Short answer, we can't rule it out. At high frequencies, typically above 1 GHz, some flux residues can create losses that affect signal integrity. If the part in question is not in a high-frequency application, then the likelihood of the residue having an impact on performance is negligible.

One way to find out: carefully remove a "failed" part, and clean the flux residue from both the part and the board. Don't remove the solder. Now re-solder the part, using a low-solids liquid no-clean flux.

After soldering, flush under the part with alcohol to remove as much of the remaining liquid flux residue as possible. Dry the board thoroughly and re-test. This may not be an easy test to do, and if the part still fails there is the question of whether it was damaged in the removal/reinstallation.

A second path for investigating the failures is to have the manufacturer test the 'failed" parts. If they are true failures, they may be able to provide guidance as to the cause. If they are not failed, then see alternative 1 below.Some alternative explanations for the failures:
  1. A circuit design that is not robust, and fails with certain combinations of component tolerances
  2. Moisture damage to the parts (do they have an MSL higher than 2? Are they stored properly prior to use?)
  3. ESD damage to the parts (What voltage level are the parts sensitive at? Is an ESD control program in place and effective?)

Fritz Byle
Process Engineer
Fritz's career in electronics manufacturing has included diverse engineering roles including PWB fabrication, thick film print & fire, SMT and wave/selective solder process engineering, and electronics materials development and marketing. Fritz's educational background is in mechanical engineering with an emphasis on materials science. Design of Experiments (DoE) techniques have been an area of independent study. Fritz has published over a dozen papers at various industry conferences.

Most likely thermal failure is due to excessive voids in the ground pad of the QFN. The voids limit thermal conduction from the device to the ground plane where the heat is dissipated to the PCB; a common problem with QFN assembly.
  1. X-ray for voids.
  2. Ensure solder volumes match device manufacturer's requirements.
  3. Try a different paste deposit pattern for the large ground pad such as a window pane pattern. The grid pattern may provide an exit route for some of the gaseous volatiles from the paste to escape.
  4. Review reflow profile to ensure it matches paste manufacturer's requirements. Try altering the profile within the limits of acceptability. Perhaps slowing the process or using a ramp-type profile to mitigate ground pad voiding.
  5. Switch to a solder paste less prone to voiding.
Unless the circuit is very high speed, No-clean paste deposits shouldn't be an issue for circuit capacitance.

Gary Freedman
Colab Engineering
A thirty year veteran of electronics assembly with major OEMs including Digital Equipment Corp., Compaq and Hewlett-Packard. President of Colab Engineering, LLC; a consulting agency specializing in electronics manufacturing, root-cause analysis and manufacturing improvement. Holder of six U.S. process patents. Authored several sections and chapters on circuit assembly for industry handbooks. Wrote a treatise on laser soldering for Laser Institute of America's LIA Handbook of Laser Materials Processing. Diverse background includes significant stints and contributions in electrochemistry, photovoltaics, silicon crystal growth and laser processing prior to entering the world of PCAs. Member of SMTA. Member of the Technical Journal Committee of the Surface Mount Technology Association.

Two papers will be published on this topic at SMTAI:
  1. Reactivity of No-Clean Flux Residues Trapped under Bottom Terminated Components
  2. BTC/QFN Test Board Design Considerations and Method for Qualifying Soldering Materials and Cleaning Processes
Both papers use non-standard test boards with sensors placed under the bottom termination at the thermal paddle and thermal pads.

A couple of the challenging issues with QFNs is the large thermal mass of solder and the low standoff gap. When the flux has no channel to outgas, large voids will be present in the thermal paddle (ground lug), residues will bridge power and ground and the residue has a high potential to be active.

To address these issues, the research papers noted study effective means to outgas flux during reflow, flux compositions that have a lower tendency to be absorbed by moisture and cleaning effects.

At IPC APEX I will teach a Professional Development Course on "Design for Reliability as a Function of Cleanliness and Contamination Control."

If you plan to attend SMTAI and/or IPC APEX, some of the content from these research efforts could be helpful in knowing what causes the issue and design options for addressing the issue.

Mike Bixenman
Kyzen Corp.
Mr. Bixenman is the CTO for Kyzen Corp. Kyzen Corp. is a leading provider of engineered cleaning fluids for high technology manufacturing environments.
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