Ask the Experts
January 26, 2018
Stencil Cleaning Frequency
What is the industry standard for the amount of time between stencil cleaning?
Expert Panel Responses
I would recommend reviewing the IPC-7526document, Stencil and Misprinted Board Cleaning Handbook. It's give you anexcellent overview of stencil cleaning methods, available chemistry types, andprocess considerations. It will give you various options to consider whenmatching with your process and requirements.
Typically I would consider the followingwhen setting up a cleaning cycle.
For a standard 0402(1002 metric) chipcomponents, I would recommend every 3th print dry, 5thwet with vacuum + dry.
Note: This is derived from me theproduct that I use. You will need to inspect your post printing, and postreflow, to determine your optimum recipe.
- Smallest size of stencil aperture
- Type of paste being cleaned of thestencil
- Method of cleaning(Dry or Wet)
- Type of cleaning solvent
- Type of wiper paper
Process Engineering Manager - Electronics
Altech UEC, South Africa
Currently with Altech UEC and responsible for technology road map in PCBA electronic manufacturing and technical support for PCBA electronic manufacturing for Altech UEC and its JDM's. Over 7 years in SMT, Radial Insertion, Wave solder & Test Applications.
Thereis no established industry standard for a stencil cleaning interval. Itdepends on the complexity of the assembly, the solder paste you use,stencil design and printer settings.
Rule of thumb is to clean yourstencil once you begin to experience non-repetitive results. For example,I worked on an assembly with a component mix so high that we needed to cleanthe stencil every print due to small aperture clogs while on other assemblieswe cleaned the stencil very 10-15 prints.
Senior Manufacturing Engineer
Edithel is a chemical engineer with 20 year experience in manufacturing & process development for electronic contract manufacturers in US as well as some major OEM's. Involved in SMT, Reflow, Wave and other assembly operations entailing conformal coating and robotics.
Thereisn't any "standard" for the number of prints between wipes. It is up to you todetermine how many prints you can undergo before it is necessary to clean thestencil. It depends on several factors. If the initial setup is off, then youwill need to wipe more often.
If the humidity and/or room temperature are toohigh, the paste will tend to slump and smear more easily, and you will need towipe more often. If there are excessive HASL deposits near the apertures thatprevent good gasketing between the stencil and the PWB, you will have some pastesqueeze-out and will need to wipe more often. If the squeegee pressure is toohigh, the same squeeze-out can occur.
If separation of the flux and solidshappens (inadequate mixing or poor quality paste) the flux will squeeze outonto the stencil and prevent a clean snapoff. The more apertures in thestencil, the more chances for issues; some boards will need to be cleaned at ahigher frequency than others. Old paste will tend to be of a higher viscosity(dried out) and you will see more aperture clogs. On the other hand,excessively sheared paste (printed several times back and forth on the stencilwithout replenishment) will lose viscosity and be more likely to havesqueeze-out issues.
Thereare a lot of reasons where you could find yourself having to clean after everyprint. With all of the variables under control, a good setup and good paste anda good environment (67 to 69 deg. F at 40-50%RH) you should be able to print atleast 10 very complex PWBs before another wipe is required.
As I have pointed outin several previous posts, there are a large number of variables that must becontrolled in both the paste handling and printing processes. If they are notcontrolled poor printing results, as well as more frequent cleaning of thestencil between prints.
This is why the controls over both the material(paste), the preparation (proper mixing to bring to room temperature and withinthe viscosity range on the manufacturer's Technical Data Sheet), and theprinter setup are so critical; they can greatly affect the amount of touchupand rework required as well as the efficiency of the paste printing processitself.
Takethe time to ensure you have control over the variables from the time the pastehits the dock all the way through the printing process; every minute investedin that endeavor will pay off at least 60 times in lost production time andrework hours and prematurely discarded solder paste.
It'snot that hard to accomplish, but it takes a real paradigm shift or sea changein education, awareness, and attitudes to keep it going.
Richard D. Stadem
Richard D. Stadem is an advanced engineer/scientist for General Dynamics and is also a consulting engineer for other companies. He has 38 years of engineering experience having worked for Honeywell, ADC, Pemstar (now Benchmark), Analog Technologies, and General Dynamics.
Idon't know if there is an industry standard, but common sense would seem todictate to clean the stencils as quickly as possible to prevent the paste fromdrying in the stencil apertures. Some of these apertures are so small, such as01005 and 0201, you would want to the paste to still be viscous and not driedwhen being cleaned.
I would think that if the paste dried out, it would muchmore difficult to removed and in many cases would not be removed and this wouldbe cumulative on subsequent usage of the stencil and completely plugged holewould be the result.
It would also recommend that all facilities have semi or automatic cleaningsystems to clean the stencils to reduce the variable of cleaning them manually.
Vice President, Technical Director
At EPTAC Corporation, Mr. Lambert oversees content of course offerings, IPC Certification programs and provides customers with expert consultation in electronics manufacturing, including RoHS/WEEE and lead free issues. Leo is also the IPC General Chairman for the Assembly/Joining Process Committee.
Your question is an excellent one. There is aGrand Canyon-sized gulf between production engineers in the electronics worldas they debate the optimal stencil printing process. Some engineers clean afterevery print; some clean after twenty.
Some supplement the cleaning withmultiple passes of the cleaning rolls, with solvents, with interim-cleaningsusing pre saturated wipes and even ultrasonic cleaning ofthe difficult areas of the stencil. Then there are the "outside" experts:the stencil printer makers, the stencil cutters, the solderpaste companies, and even the customers. It's a mosh-pit of opinions; realdata is hard to find.
Why do we work so hard? The SMT process, when fine-tuned, deliveries economies of scale andthrough-put which could be achieved by no other technology. The total annualvalue of the electronics assembly industry probably exceeded $1 trillion in2014 - a staggering output by any measure. The vast majority of thisoutput is in the form of surface-mount circuit boards, which means somebody,somewhere, is struggling with their stencil printing process.
At the heart of the SMT process, stencil printingis the weakest link in electronics production. The mere complexity of theprocess is causing costs to rise and yields to fall. One industry expert(se: Richard Clouthier, "The Complete Solder PastePrinting Process: Stencil Aperture Area Aspect Ratio," SMT Magazine,January 1999) found 39 process variables that must becontrolled to get reasonable yields in today's stencil printing process.
In another perspective on the limits of currenttechnology, experts estimate that more than 50% of today's production defectsare caused by errors in the screen printing process , and another industryleader has privately confessed to this author the number actually is closer to90%). As noted by Kamen, Goldstein, Asarangchai, et al. in "Analysis of Factors that Affect Yield in SMTAssembly"%2
Mr. Jones is an electronics cleaning and stencil printing specialist. Averaging over one hundred days a year on the road, Mike visits SMT production sites and circuit board repair facilities in every corner of the globe, helping engineers and technicians work through the complex trade-offs today's demanding electronics require.
I'mnot aware of an "industry standard" as far as time between cleanings goes,usually it's set up based on frequency of prints. Obviously the stencil shouldbe cleaned if the prints start looking poor. For No-Clean pastes, I recommendevery 3 PCB's for fine pitch devices, 5-10 for normal.
You can usually go alittle longer with water soluble paste, but no need to push it. After breaks,lunches and shift changes, or any time there is more than 10-15 minutes betweenprints. Try doing some experiments to dial in your needs based on yourtechnology and pastes.
Esterline Interface Technologies
Mr. Hughes has been in the electronics manufacturing field for 20 years. Operating the processes and as a manufacturing engineer for the last 14 years. He is also a CIT as well as an SMTA Certified Process Engineer.
Thetime between stencil cleaning is going to depend on your type of solder pasteand printing process. If you use an SPI machine, this will tell youwhenyour stencil needs cleaning. Some SPI machines have closed loop feed back tothe screen printer, signaling when to clean.
If post print inspection isDonemanually, you will need to closely monitor your process to develop a screencleaning frequency. Your environment also plays a big role in cleaning screens.Ifyou do not have a good temperature and humidity control system, you may have adifficult time coming up with a consistent cleaning cycle.
Manufacturing Applications Specialist
Mr. Bush has 20 years experience in electronics contract manufacturing. Major areas of expertise include through hole, SMT, wave and selective soldering.
Assuming that you are talking about the frequency of an understencil wipe, there is no standard. It is very process dependent. A goodpractice is a dry wipe every 6 to 10 prints.
If you find that you have to wipe more frequently and/or use asolvent wipe followed by a vacuum cycle, that is a good indication thatsomething is wrong with the printer set-up; like poor gasketing.
Technical Support Engineer
Kay Parker is a Technical Support Engineer based at Indium Corporation's headquarters in Clinton, N.Y. In this role she provides guidance and recommendations to customers related to process steps, equipment, techniques, and materials. She is also responsible for servicing the company's existing accounts and retaining new business.
I would recommend youobtain, IPC-7526, which covers all aspects of stencil cleaning...
Based in. Northern California since 1971. Founded JSK Associates in 1979. Actively involved in soldering, cleaning, chemistries. 30 years experience in EOS/ESD control.
There are a lot of factors that will determine the stencilcleaning frequency
You will have to perform a capabilitystudy for each assembly that you are running.
- Assembly populationcomplexity
- Smallest aperture
- Stencil thickness
- Solder paste used
- Equipment capabilitiesregarding cleaning - dry, wet, vacuum options + solvents used
- Humidity and temperature(environment)
- Paste time on the stencil
- Blade angle
- Using nano-coating or not
- Stencil material andmanufacturing method
Engineering and Operations Management
Georgian Simion is an independent consultant with 20+ years in electronics manufacturing engineering and operations.
Contact me at firstname.lastname@example.org.