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Dr. Oommen Tharakan Kuttiyil Thomas


Group Director
Vikram Sarabhai Space Centre

Dr. Tharakan’s experience is in the area of avionics package production, including reflow, test vector generation, formal verification of VHDL and verilog designs, screening of EEE components, quality control of electronic packages, and indigenisation of EEE components. Senior Member of the IEEE

Dr. Oommen Tharakan Kuttiyil Thomas has submitted responses to the following questions.
Baking Old PCBs Prior To Reflow
The temperature and duration to which a bare PCB has to be subjected to baking depends on the thickness of ...
Design Considerations and Impact on Assembly
Given below are seven cases: Replacement of an SMT passive device with another one for performance improvement. This has resulted ...
Proper method to bake PCB's
PCBs can be considered as MSL 3 grade items. Hence after the prescribed exposure to ambient conditions these need to ...
Chip Component Cracking During Placement
For High reliability application such as in Aerospace, it is mandatory that an incoming inspection be carried out on SMT ...
Oxidation of Solder Balls During Secondary Reflow
It is assumed that the second reflow is meant the second side of the Printed Circuit Board. In soldering the ...
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Zestron

Defluxing Ultra-Fine Pitch CoW Devices? Read This.
DI water falls short on copper pillar packages. Get proven cleaning parameters for CoW devices with <25μm pitch in our white paper.
ZESTRON Americas
Uyemura