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October 25, 2022 - Updated January 16, 2019 - Originally Posted Exposed Copper DefectIs exposed copper considered a class 3 defect per IPC-610 or J-STD documents? J.U. |
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That would depend on where the copper is exposed. Some component types normally have exposed copper where the packages are excised from lead-frames during fabrication. Ex: QFNs. For the PCBs, copper exposed by solder mask or laminate defects would not be acceptable.
Principal Product Engineer Benchmark Electronics, Inc. 30+ years of experience working with electronic and electro-mechanical manufacturing and design (medical, automotive, military, computer, and industrial controls). Military veteran - served as a Combat Engineer with the United States Marine Corps.
No. Exposed copper is not considered a defect in J-Std-001 or IPC-A-610. It used to be defects ways back when - years ago. A good example is use of OSP surface finish. All the copper pads don't get covered with solder even when the solder joint is perfect.
President Ray Prasad Consultancy Group Ray Prasad is the founder of Ray Prasad Consultancy Group which provides teaching, consulting and technical expert services in tin-lead and lead free technologies using SMT, BGA, BTC, fine pitch and through hole components. Mr. Prasad is a long time member of IPC, and is currently the chairman of BGA committee IPC-7095 "Design and Assembly Process Implementation for BGA" and Co-Chairman of recently created IPC-7093 "Design and Assembly Process Implementation for Bottom Terminations" surface mount Components (BTCs) such as QFN, DFN and MLF.
Basically, so long as exposed copper or basis metal is not part of the required solder fillet area or the result of damage to leads, conductors, or lands that exceeds other requirements for lead or PWB damage, it is at worst, a process indicator for Class 3. Exposed copper that is the result of cut leads or on vertical edges of a PWB conductor or land-not the result of damage and not part of the required solder fillet-is acceptable. If the exposed area is the result lead deformation or PWB damage that exceeds other requirements (section 7 for leads, section 10 for PWBs), it is a defect.
Manufacturing Process Engineer TE SubCom John has more than thirty years of precision metal fabrication, contract manufacturing, fiber optics and electronic manufacturing experience in quality and production management and process engineering capacities. He has been a Certified IPC Trainer for more than ten years. He is currently a Manufacturing Process Engineer for High Reliability Optoelectronic assemblies used in undersea fiber optic cable systems.
No this is not considered a defective condition for any class of product. There are many conditions in the documents that state exposed basis material is an issue however this is all based upon damage to the components leads and the plating on the component leads, regardless of the basis material. Exposed copper is only a defect when it impacts the creation of the solder joint. Additionally is exposed copper was an issue then OSP coated boards would be a thing of the past and they are not. Section 4.18.1 Exposed Surfaces, references the impact of basis materials, i.e., copper or equivalent, shall not impact the formation of acceptable solder connections. The Space Addendum 001 GS states the same thing but also adds that the only materials which are not to be exposed are Alloy 42, Kovar, or any iron based materials. This is all due to the potential corrosion, i.e., rust. IPC-A-610 references exposed ends of wires shall not be exposed in section 4.5.4, and this is due to potential exposure of the conductor to cause a short. Section 5.2.1 Soldering Anomalies - Exposed Basis Metal states, "...Exposed basis metal or surface finishes should be considered normal under these circumstances, provided the achieved wetting characteristics of the solder connection areas are acceptable." This basically states the solder joint cannot be impacted by the expose material, however exposed copper is allowed on pads and the vertical edges of all conductors traces do not have to be covered and can be left exposed. Exposed copper was not allowed the military years ago, however this was changed and it is now an acceptable condition. Some examples of exposed copper we should be aware of is the copper piping in homes and copper roofs on buildings. Many of those have been around for many years.
Vice President, Technical Director EPTAC Corporation At EPTAC Corporation, Mr. Lambert oversees content of course offerings, IPC Certification programs and provides customers with expert consultation in electronics manufacturing, including RoHS/WEEE and lead free issues. Leo is also the IPC General Chairman for the Assembly/Joining Process Committee.
IPC-A-610F section 5.2.1 Soldering anomalies - Exposed basis metal states that exposed base metal is acceptable for Class 1, 2, and 3 assemblies under certain conditions. The conditions include: vertical conductor edges, cut lead and wire ends, OSP coated pads, and exposed surface finishes that are not part of the required fillet area. Nicks and scratches are a defect if they exceed the requirements of 7.1.2.4 and 10.3.1 which detail reduction of the conductor dimensions. If you don't have copies of IPC-A-610F and J-STD-001G then I suggest getting these standards.
Field Applications FCT Assembly Tony has worked in the electronics industry since 1994. He worked as a process engineer at a circuit board manufacturer for 5 years. Since 1999, Tony has worked for FCT Companies as a laboratory manager, facility manager, and most recently a field application engineer. He has extensive experience doing research and development, quality control, and technical service with products used to manufacture and assemble printed circuit boards. He holds B.S. and M.B.S. degrees in Chemistry.
YES: Exposed copper is a class 3 defect per IPC-A-600 EXCEPT for card edge connectors. Remember those?
President Circuit Connect, Inc. Bob has been in PCB design and fabrication since 1976. He has held elected positions with the SMTA, is a member of the MSD Council, has served as a committee member for various IPC standards and is a Certified IPC Trainer.
This could also be an assembly question. From IPC-6012 For areas that are not to be soldered, 1% of the conductor surface can be exposed copper (class 3) and 5% for class 1 and 2. For solderable surfaces, exposed copper is not acceptable. Visible coverage and solderability must pass J_STD requirements.
Quality Manager Sunstone Circuits Kevin is part of the Sunstone Management team. In his role as Quality Assurance Manager, Beattie’s 25+ year background in Printed Circuit Board manufacturing is a tremendous asset to the Sunstone team. In addition, he brings valuable experience from his previous roles in the following areas: process engineering, new process introductions, support of nearly every manufacturing process, and extensive knowledge of Continuous Improvement, ISO, IPC, and various other industry requirements.
Per IPC 610G 5.2.1 "Soldering Anomalies - Exposed Base Metal" Some printed circuit board and conductor finishes have different wetting characteristics and may exhibit solder wetting only to specific areas. Exposed basis metal or surface finishes should be considered normal under these circumstances, provided the achieved wetting characteristics of the solder connection areas are acceptable. This applies to Class 1,2,3.
Director of Product Management AIM Timothy O'Neill is the Director of Product Management for AIM Solder. AIM Solder is a leading global manufacturer of assembly materials for the electronics industry. Mr. O’Neill has 25 years of industry experience is a Certified IPC Specialist.
Mr. O’Neill’s responsibilities include developing product and technical information; he is a technical writer and presenter for industry trade publications and events and has been recognized as a Speaker of Distinction by the SMTA. Leaving exposed copper on a printed circuit board assembly is not recommend for any end application environment since copper quickly corrodes in most environments, potentially precipitating a failure. A solder mask touch-up can be used if the exposed copper is only in a very small area. A better alternative is to apply conformal coating to eliminate the exposed copper using a conformal coating system since these systems have better control over the coverage area and thickness as opposed to manual brushing or manual aerosol spraying.
General Manager Nordson SELECT Carlos Bouras is the General Manager of Nordson SELECT and has over 30 years of experience in the electronics manufacturing industry. Carlos's expertise is in process engineering, product development and manufacturing operations. For the past 15 years Carlos has focused specifically on automated assembly issues and is the holder of several US patents for non-contact dispensing and precision dispensing of adhesives for the packaging of microprocessor devices.
Reader Comment
I’ve read through all of these great responses and I think the best answer is: “it depends.” Exposed copper on an unpopulated PCB could lead to issues during the manufacturing process, such as poor wetting due to copper oxidization, insufficient solder fillets due to increased solderable area, bridging between non-common conductors during wave soldering, Etc.
Jesse Gresh, Kyocera AVX
Exposed copper at the PCBA level shouldn’t really be an issue provided that minimum electrical clearance and conductor damage rules are not violated. Sure, one can argue that copper can react chemically due to its environment, but copper usually just forms a protective layer of reacted material. Think of pennies or the Statue of Liberty. They don’t disintegrate. If the PCBA is intended for such a harsh environment that could corrode copper to the point of failure, then I would say that it’s going to need conformal coated to protect all of the other metals present as well. I don’t have any IPC texts (although I am a certified trainer,) or MIL standards to quote off of, but the basis of all of their rules are simple: Fit, Form, Function, and Reliability. Those standards can’t cover every possible situation, so, as long as you can prove that it doesn’t affect the FFFR, it’s not a defect. |
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