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Ask the Experts

QUESTIONS

MEMBERS

September 22, 2026 - Updated
November 17, 2015 - Originally Posted

Delamination After V-cut

We have a problem with delamination after breaking our board from a multi-up panel. The material is cem3-V0. The delamination is long the edge of board after breaking at the v-cut before wave soldering.

The depth of v-cut it is within specifications. The v-cut is slightly unbalanced, however when running 2 different models, only 1 model is affected. Do you have a suggestion for the root cause?

N.Z.

Expert Panel Responses

This is a common issue for the V-cut depanelization process. There are multiple variables in this process to be considered:

V-cut design of the board - depth and angle
V-cut consistency across the board
Blade design (angle) and dimension
Positioning of the board in the depanelization process (is the assembly leveled when you perform this)
The humidity and the moisture content of the PCB (ideally the boards are dry) The problem of having the same board for 2 models with only one failing this process might be related to lot number, moisture content and/or operator performing the job.
There is no silver bullet for this problem however I hope that this is giving you a starting point.

Georgian Simion
Engineering and Operations Management, Independent Consultant

Georgian Simion is an independent consultant with 20+ years in electronics manufacturing engineering and operations Contact me at georgiansimion@yahoo.com.

I would suggest reviewing IPC-4101D WAM1 Specification for Base Materials for Rigid and Multilayer Printed Boards, for the particulars of the CEM3-VO materials, as there are 5 different types: /12, /14, /16, /35, /81 which all have different Tg.

The need to verify that all the materials behave the same way, one would need to know which of the CEM 3 materials was used. This problem also was seen with FR-4 materials and it was all related to two different FR-4 materials were used by two different fab houses and it wasn't until the laminate was analyzed that the problem was found.

I recommend having a lab check out the laminate material to determine which one was used. Hope this helps and if more is needed please let me know.

Leo Lambert
Vice President, Technical Director, EPTAC Corporation

At EPTAC Corporation, Mr. Lambert oversees content of course offerings, IPC Certification programs and provides customers with expert consultation in electronics manufacturing, including RoHS/WEEE and lead free issues. Leo is also the IPC General Chairman for the Assembly/Joining Process Committee.

Without knowing more about the affected PCB, difficult to say for sure but a number of things that could affect this would be. Has the PCB seen high temperature during manufacture e.g. HASL - especially leaded? Are the PCB's warped in any way (this would also suggest high heat in manufacture) What is surface finish - again related to the above. Assuming a double sided PCB, CEM3 is not a homogenous material and almost always sees woven prepreg placed top and bottom of a non woven core. The non woven core has a higher rate of z axis expansion and that will create stress in the PCB. Also, how long have the PCB's sat since V Score and in what conditions? V score essentially breaks glass fibres and that on it's own will make the PCB material more likely to uptake moisture (in itself, a common culprit of delamination, even with FR4 material)

Grant Main
Technical Sales Manager, Fineline VAR Ltd

40 Years in PCBs. Large and small companies in the UK and the US. Experienced Process Engineer, DFM, Materials, Impedance Control, Surface Finishes, etc. Working with Fineline now across the portfolio of manufacturers covering rigid, flex, rigid flex, ATE, Load Boards, MSAP, and other existing and emerging technologies.

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