March 18, 2026 - Updated
April 1, 2015 - Originally Posted
Estimating Failure Rate During Rework
Is there a way to estimate the potential failure rate introduced by hand rework of one SMT part. The process involves de-soldering and soldering a new part using soldering iron/tweezers. We're trying to understand the benefit of the rework versus the potential defects induced.
A.F.
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Reworking a solder joint typically increases the thickness of the intermetallic layer. Thickening the intermetallic layer can translate to a more brittle solder connection.
In extreme situations, the intermetallic can become so thick that the solder will actually dewet and not want to "stick" to the pad.
It should also be noted that successive rework cycles can reduce the thickness of the pad metallization. This can be especially problematic with the "knee" of a through hole where a substantial amount of the metallization may have already "washed away" during wave soldering.
Kay Parker
Technical Support Engineer, Indium Corporation
Kay Parker is a Technical Support Engineer based at Indium Corporation's headquarters in Clinton, N.Y. In this role she provides guidance and recommendations to customers related to process steps, equipment, techniques, and materials. She is also responsible for servicing the company's existing accounts and retaining new business.
I'm not sure anyone can answer this question with the information provided. Test failures were typically balanced between process defects and product defects,so to try to determine the failure rate of a component removal and replacement would required knowing the MBTF failure rate of the particular component.
Secondly this also depends upon the type of component being replaced and why it is being replaced. For example, was the component removed to fix a board condition beneath the component and the component was going to be reused, or is a new component going to be installed. I would not suggest using the hot tweezers to replace the component if it is a chip type component such as a capacitor or resistor as the heat is applied to close to the component itself and can damage the component.
There are lots of issues to address but if the operator is well trained I would say the odds are just as good as the first time the component was installed onto the product.
Leo Lambert
Vice President, Technical Director, EPTAC Corporation
At EPTAC Corporation, Mr. Lambert oversees content of course offerings, IPC Certification programs and provides customers with expert consultation in electronics manufacturing, including RoHS/WEEE and lead free issues. Leo is also the IPC General Chairman for the Assembly/Joining Process Committee.
One alternative is to examine your rework area and answer the following questions:- Total rework time. (min)
- Cost of rework (labor rate) - $
- Cost of part - $
- Potential damage to nearby components (assign a value,0-5)
- Potential for scrap (assign a value, 0-5)
With the information you can create a small chart like a "DFMEA" to give you a better view of your rework operation.
Edithel Marietti
Senior Manufacturing Engineer, Northrop Grumman
Edithel is a chemical engineer with 20 year experience in manufacturing & process development for electronic contract manufacturers in US as well as some major OEM's. Involved in SMT, Reflow, Wave and other assembly operations entailing conformal coating and robotics.
As a general rule of thumb, there is a 10X jump in defect creation between each assembly process.
SMT Reflow will, on average, have a 50 DPMO level. Wave will, on average, have a 500 DPMO level. Hand or Rework will, on average, have a 5000 DPMO level.
Even when you go to best in class, the 10X rule still tends to apply SMT Reflow best in class can be 2 to 10 DPMO. Wave best in class can be 20 to 100 DPMO. Best in class will avoid rework at all costs.
Dr. Craig D. Hillman
CEO & Managing Partner, DfR Solutions
Dr. Hillman's specialties include best practices in Design for Reliability, strategies for transitioning to Pb-free, supplier qualification, passive component technology and printed board failure mechanisms.
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