Low Temperature Solder-SMT Manufacturability and Quality Considerations

Rajen Sidhu, Ph.D.
AMD
OR, USA

Sireesha Gogineni
AMD
CA, USA

Alfred Yeo, Ph.D. and Eric Yong, Ph.D.
AMD
Singapore

Low temperature solder (LTS) applications have been gaining momentum in the electronics industry offering major advantages compared to traditional Pb-free alloys, specifically, enabling advanced technology scaling combined with the value proposition of reduced carbon footprint. This study focuses on developing manufacturing & solder joint quality understanding for Sn-Bi based alloys. Investigation of Hybrid LTS process (defined as SAC305 ball-grid array (BGA) package reflowed to a printed circuit board (PCB) using LTS paste technology) with a focus on major challenges with surface-mount technology (SMT) assembly and key parameters to improve processability. Additionally, a preliminary manufacturing and solder joint quality assessment for Homogeneous LTS BGA interconnects will be reviewed, highlighting the full benefits of transitioning LTS technology.

This study highlights the importance of component supplier LTS assessments to ensure smooth transition and overall readiness of future LTS industry conversions. To summarize, this study comprehends Hybrid LTS SMT limitations based on package warpage boundary conditions and narrow process window due to opposing defect modes. Unless there is a significant reduction in package warpage between 190oC to 240oC (e.g., Package A from Fig 6), risks outweigh benefits for Hybrid LTS. Based on extensive characterization, the team was able to establish package boundary conditions best suited for different HVM SMT conditions as shown in Figure 17. The transition to a homogeneous LTS BGA interconnect allows for a much wider warpage range and overall larger process window compared to both SAC305 and Hybrid LTS and would be the preferred overall path for enabling LTS system assembly.