Interposers for system in package will became more and more important for advanced electronic systems. As the industry moves toward HPC (High Performance Computing) for huge data transmission with low power consumption. The requirements for PKG structure have become more challenging. The major engineering requirements for HPC application are high density, high speed data transmission, low loss, precision manufacturing and low cost. On the 2.5D heterogenous package structure, key technology is fine wiring connected with CPU chip and HBM chips. The fine wires needed high speed transmission. On the other hand, Fanout panel level packaging (FOPLP) technology spread out 2.5D system integration. FOPLP has no core substrate like silicon TSV or glass TGV, it has advantage on manufacturing cost and panel scale productivity.
This paper presents first the demonstration of RDL interposers with fine pitch firing and low loss dielectric layers. High speed transmission characteristics for RDL interposer modeled with eye diagram. Excellent transmission obtained on fine pitch trace area using low loss tangent dielectrics.
Fine wiring L/S=1/1um demonstrated using Semi-Additive-Process on the 300x400 panel format. Excellent uniformity of resistance obtained for HPC application.
New insulation materials developed and estimated via diameter, warping properties and high frequency characteristics. Fine via types have benefit for high density routing design. Low loss types have advantage on the high-speed transmission.
After carrier glass mechanical peeled off, Low stress insulator compensate mold compound warping on the 300x400 format glass.
Modeling transmission structure, Excellent transmission characteristics obtain fine pitch area using low loss dielectrics.
