Miniaturization with Help of Reduced Component to Component Spacing

Jonas Sjoberg
Flextronics Advanced Engineering Group
Shah Alam, Malaysia

Ranilo Aranda
Flextronics Advanced Engineering Group
Zhuhai, China

David Geiger, Anwar Mohammed and Murad Kurwa
Flextronics Advanced Engineering Group
San Jose, CA, USA

Miniaturization and the integration of a growing number of functions in portable electronic devices require an extremely high packaging density for the active and passive components. There are many ways to increase the packaging density and a few examples would be to stack them with Package on Package (PoP), fine pitch CSP's, 01005 and last but not least reduced component to component spacing for active and passive components.

The use of fine pitch CSP, PoP component's and 01005(Imperial) poses a number of challenges for PCB Design, SMT Assembly process and reliability and by placing them closer together many of these challenges will be magnified. A feasible assembly process must be achieved. The assembly process ranges all the way from screen-printing, placement and reflow soldering in air or nitrogen.Many factors influence the quality of the assembly process and with the reduced pitch and component spacing, the process capabilities for both assembly and PCB fabrication will be tested to its limit and beyond.

In many cases these assemblies also require a rework process either in the manufacturing facility or at repair centers when the product fails in the field during usage. In addition the correct materials such as PCB material, PCB surface finish, solder paste, dipping flux and PCB design need to be selected to ensure high yielding, cost effective and reliable interconnects. Of course, the mechanics of the products makes a big difference as well but it is very product dependent. Many of today's products leave little room for designing the mechanics in the most reliable way due to total cost and overall look and size of the products.

This paper will discuss different layouts, assembly and material selections to reduce component to component spacing down to 100-125um (4-5mil) from today's mainstream of 150-200um (6-8mil) component to component spacing.

There are many ways to achieve miniaturization and the key is to have a "toolbox of technologies" to be able to fulfill various requirements. Depending on the product several options can be considered and the selection should be based on data and not assumptions. It is important to consider the interaction between multiple technologies in all areas during development and deployment since several advanced technologies will, in most cases, be used on the same product.

Based on our studies, 125um component to component is feasible with both a 75um and 100um stencil thickness. At 100um component to component spacing a 4mil (100um) stencil is not acceptable, but despite a DMPO of around 370 with a 3mil (75um) stencil, this can in some cases be acceptable.