Boundary Scan Advanced Diagnostic Methods

Christopher Cain
Agilent Technologies
Loveland, Colorado USA

Boundary-scan (1149.1) technology was originally developed to provide a far easier method to perform digital DC testing to detect intra-IC interconnect assembly faults, such as solder shorts and opens. Today's advanced IC technology now includes high-speed differential interfaces that include AC or DC coupling components loaded on the printed circuit assembly. Simple stuck-at-high/low test methods are not sufficient to detect all assembly fault conditions, which includes shorts, opens and missing components. Improved diagnostics requires detailed circuit analysis, predictive assembly fault simulation and more complex testing to isolate and accurately detect all possible assembly faults.

Several cases will be presented to illustrate how usage of circuit information and predictive analysis of potential assembly faults will provide more precise and accurate diagnostic information. Special attention will be paid to the increasing usage of high-speed differential logic interfaces and their associated discrete components and connectors, which increasingly have no probing access and then traditional in-circuit test cannot be accomplished.

The material will also include a discussion of future challenges and their potential impact on diagnosis of assembly faults. Many in the industry are very much aware of the decline in probing access and are wisely skeptical of claims that providing a function test will provide an accurate and useful diagnostic indication upon failure. This material is intended to further the development and evaluation of solutions that not only detect, but usefully diagnose assembly faults... which clearly are not disappearing any time soon!

In the context of printed circuit assembly testing, it seems common to assume that fault detection and printed circuit assembly fault diagnosis are equivalent. An advanced boundary-scan test designed to precisely detect an assembly fault requires a great deal of test circuit simulation / analysis, combined with actual boundary-scan test capability of the IC's and multiple sources of testing information. Stating that a particular circuit or assembly is "tested" doesn't mean that the resulting failure message will lead to a precise and useful diagnosis.

Fundamentally it is quite useful to validate a particular boundary-scan test solution, by thorough insertion of likely assembly faults to determine if they are truly discovered AND the resulting diagnostic message is usable by an assembly repair technician as well as the manufacturing or design engineers.