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Method for Accurate PCB Impedance Simulation of Any Specific Stack-Ups
The reasons of inaccurate PCB impedance simulation of the traditional simulator and a novel and cost-effective method for accurate PCB impedance simulation are discussed.
Technical Paper
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Authored By:
Shenzhen SiSolver Technologies Ltd
Shenzhen, China
Summary
This paper analyzes the reasons of inaccurate PCB impedance simulation of the traditional simulator and introduces a novel and cost-effective method for accurate PCB impedance simulation of any specific stack-ups. The new method doesn't need to extract material properties from prototype boards or empirical modified DK from PCB Fabs. The test results show the new method & tool have better precision simulation ability with deviation less than 2.5%, compared with traditional simulation tool. It can meet the requirement of less than 5% tolerance impedance to match the high speed & high frequency PCB design, and consequently leads to a more cost-saving and time-saving method to rapidly occupy the market.
Conclusions
DK distribution of FR4 mixed dielectric is not uniform, and Electromagnetic field distribution of impedance model is not uniform too. Traditional method uses a fixed DK to design, but the real effective DK is multivariable. 10% impedance tolerance is the ultimate limit of the empirical DK method, and it helps only for some simple boards. Empirical DK method results in the Black-Box of impedance design process. The non-transparent Black-Box lead to problems on the quality, cost and lead-time. The introduced new method using the specific stack-up & DK simulation technique and multilayers dielectric field solver with resin-filled layer can achieve <2.5% tolerance. The new method is novel and cost-effective without any empirical data involved. It helps to achieve 5% tolerance spec and save lots of cost and time.
Initially Published in the SMTA Proceedings
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