Walter Pierowski

Process Engineer

Esterline Interface Technologies

Mr. Pierowski is currently a Process Engineer for SMT and Electrical Assembly with 20+ years of experience. A majority of the experience was based in screen/stencil printing for electronics manufacturing including application support for SMT, LTCC, HTCC and thick film.

Walter Pierowski has submitted responses to the following questions.

LED Component Shift During Reflow
One of the most common reasons for a component to shift during reflow is that it is"floating." The reason a ...

BGA BAll Sheer Testing
That is exactly the results I would expect from a mechanical removal of a BGA. Remember solder is designed to ...

Cleanliness Testing
One new technique is a localized cleanliness tester. There is one called C3 from Foresite. With this type of cleanliness ...

ENIG Solderability Issues
My first check would be for any contamination on the circuit board. I have in the past had issues when ...