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August 13, 2025 - Updated
October 1, 2013 - Originally Posted

Head-In-Pillow Reject Rate

We have rejects that look like head-in-pillow. We see rejects in 2 or 3 per 15,000 PCBs. Should we tinker with the reflow profile, or would you consider this reject rate acceptable?
A.B.
Expert Panel Responses
At this failure rate the oven profile would be through the last things I recommend to be changed. It is obvious that the profile is good for 99.98% of your parts. However you do not want any escapes to the customer.

The increased apertures is one way to go and it worth trying. I would also recommend to look into finer paste (type 4, 5) if your BGAs are small and increased apertures leads to high potential for bridging.

Another thing to look into: is there variation in between the ball sizes of the same part? If you use an optical centering on your pick and place equipment, is this capable of flagging ball size variation and what are the tolerances (acceptance criteria %)?

Last but not least, if this particular part is MSD, did you make sure that the storage is proper and potential oxidation of the solder balls is avoided?

Georgian Simion
Georgian Simion
Engineering and Operations Management, Independent Consultant
Georgian Simion is an independent consultant with 20+ years in electronics manufacturing engineering and operations Contact me at georgiansimion@yahoo.com.
HiP can be serious reliability issues depending on the build and where it goes. For example, in many high reliability applications, automotive or medical, this rate is considered high. In some cases there are simple fixes worth trying and these are listed below.

Although the rate you mention is not too high here for many assemblers and many choose to scrap these assemblies. It is worth noting that HiP can fail at times later and not be caught by testing after soldering.
  1. Modify thermal profile as to reduce flux removal on the top of solder paste mass before it melts completely, reducing preheat at times helps.
  2. Insure adequate Z axis pressures during component placement, a little more down pressures helps at times.
  3. Choose a solder paste where the flux is designed to reduce HiP.
  4. Check for component warpage and modify if possible the thermal profile to reduce warpage at the critical connections, shadow Moire analysis helps here.
  5. Modify stencil aperture as to apply more solder paste on the connections prone to HiP.
Warpage can be reduced to some extent by avoiding high preheat, peak temps and extending slightly the TAL.

Peter Biocca
Peter Biocca
Senior Market Development Engineer, Kester
Mr. Biocca was a chemist with many years experience in soldering technologies. He presented around the world in matters relating to process optimization and assembly. He was the author of many technical papers delivered globally. Mr. Biocca was a respected mentor in the electronics industry. He passed away in November, 2014.
What's acceptable has a lot to do with the tolerance for failures in the specific product and application. Also, you may find one only every 5000 to 7500 boards, but how many escapes do you have that are just good enough to get through your screening? These defects are difficult to detect on production x-ray screening, so your escapes may be higher than you expect.

I'd personally be hesitant to adjust the reflow profile. I'd first want to have evidence that such a change would be effective, and secondly I'd want some very convincing evidence that I wouldn't create other, potentially much larger problems.

If the problem is related to slight warping of the component during reflow, one way to mitigate it might be to see if you can increase the paste volume a little for that part. Also review the placement process and make sure the force is optimized, specifically that it is not too light.

Finally, look carefully at the incoming components. It may be that you have the occasional undersized ball that is contributing to this issue.

Fritz Byle
Fritz Byle
Process Engineer, Astronautics
Fritz's career in electronics manufacturing has included diverse engineering roles including PWB fabrication, thick film print & fire, SMT and wave/selective solder process engineering, and electronics materials development and marketing. Fritz's educational background is in mechanical engineering with an emphasis on materials science. Design of Experiments (DoE) techniques have been an area of independent study. Fritz has published over a dozen papers at various industry conferences.
I cannot comment as to whether a particular defect rate is acceptable. That depends so much on the product and process. However, if you can further reduce or eliminate the HIP defects without causing other defects, why not do it?

One way to do that is to simply increase the aperture size for the BGA with the HIP issues. More paste will reduce the potential for HIP. Of course, you need to be careful not to increase so much that it results in bridging between deposits. This change also won't have any impact on the rest of the board. Changes to the reflow profile could result in other defects if you are not careful.

Tim Jensen
Tim Jensen
Product Manager, Advanced Assembly Materials, Indium Corp.
Timothy Jensen is the Product Manager for Indium Corporation's PCB Assembly Materials and has spent over a decade troubleshooting and optimizing SMT process lines. Having worked directly on hundreds of surface mount lines, and building thousands of different products, Tim understands each customer's unique requirements, and tailors Indium's products and services to meet or exceed those needs.
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