|Ask the Experts|
February 19, 2018
We're having a problem with small chip tombstoning. The chips are lifting off one side. I know this issue has been discussed in various magazine articles and forums. I'm curious to read your input on the possible cause and how we can eliminate it.
|Expert Panel Responses|
Tombstoning is often caused by one end of the part reaching liquidus temp just before the other end. The surface tension of the liquid solder at one end pulls the part upright off the paste of the other end.
It is important to confirm this by having a good thermal profile of the assembly with thermocouples attached at or near the component ends to see what the thermal nature of the assembly is in the region of the component affected.
There are several reasons why one end of a component may be reaching liquidus sooner in time then the other end:
The goal is to allow the components to enter liquidus a little slower (reduced slope), giving more time for the entire component to heat and thus at a rate which gives both ends more time to heat the same.
With a good thermal profile of the assembly, you can make adjustments using the profiling software's prediction tools to see what oven settings can best alter the profile shape around the liquidus temp to reduce the temperature difference at each instant in time.
This may mean ramping a little faster out of the soak phase and giving the last two or three heated zones better control over the ramp rate through liquidus to peak. In other words, don't rush to peak, rather slow it down a bit and hold for a few more seconds at a little lower peak.
Senior Project Engineer
Electronic Controls Design Inc
Tombstoning happens due to imbalance in the surface tension forces exerted on the terminations of small passive components. The imbalance can be due to many different factors. Here is a listing of the key ones.
*Uneven Pad Design
*icrovia in one pad and not the other
* Varying degree of contamination on terminations
* Improper plating of terminations leading to varying degrees of oxidation
* Paste Print Related:
WS paste more prone than NC paste
Tin-Lead more prone than Lead-free
Varying amounts of paste on the pads
Improper distribution of particles and flux between the prints on the pads
* Placement offset or misalignment
* Insufficient pressure
* Nitrogen reflow more prone than air reflow
* Convection flow rate
* Improper heat distribution
* Rapid ramp rate
* Short soak time
inspīre solutions LLC
If you review the articles the two main, statistically significant factors are: 1. Pad Design and 2. Materials. There are manufactures who have solder paste formulations specifically designed to minimize and/or eliminate the occurrence of tombstoning (see the APEX 2003 proceedings). From a pad design standpoint, you want to make sure you are following well recognized design rules so that you have optimum coverage and placement of the component on the solder paste.
Tombstoning can have a variety of causes but check for the following. Are the PEC pads on both sides identical or of different sizes or, even worse, shared with another component? This will create an imbalance resulting in uneven forces on the chip during reflow. Check that the solder paste deposits are identical in shape and volume on both sides of the chip position and the chips are being placed across the position accurately with the same amount overhanging the solder paste. Also worth checking is the orientation of the chips through reflow. You will get best results if both solder joints reflow at the same time. This depends on the design, and whether this is feasible! There are a few other factors but these areas are the favorites.
Principal Engineer - CMA Lab
The cause of this defect is inadequate contact surface area of the component metalized pads in the solder paste. This could be caused by a miss alignment of the component in the printed solder paste from poor placement, poor registration of the stencil on the pad, or less than adequate component metalization surface area in the paste. Designing the pad and stencil so that greater than 50% of both metallized leads of the chip component are making contact with the solder paste deposit is the best way to prevent tombstoning. Use of non eutectic alloys is a widely recognized solution as well, but the placement / design is a much stronger influence over the defect.
Global Product Manager
Tombstoning can be designed out with Stencil/Pad layout and turning the PCB in reflow so both sides of the component receive equal heat but to be honest all these are possible but hard work. Simplest way is start to use a Low Tombstoning paste especially if used in Vapour Phase Machine. This is the simplest answer to the question. It is generally ran on a SAC305 profile but has a mix of alloys to stop Tombstoning or greatly reduce it. I know AIM Solders do one that works very well and probably others do as well so best to search out Low Tombstoning Paste on the Internet and give it a try.
Technical Sales Manager
BLT Circuit Services Ltd
This can be caused by many factors:
Regional Sales Manager
OK International Inc.
There is much "prior art" on the subject of tombstoning and many different variables and causes. Here are a couple of articles that nicely and concisely summarize the variables and offer solutions. From SMTnet, is an EFD article, Tombstone Troubleshooting From Circuitnet, a Cobar Products article, Tips for Preventing 'Tombstoning' of Chip Components The one from the Circuitnet site is especially nice as it gives engineering analysis showing the forces involved which can give you greater understanding and insight as to the mechanics of tombstoning.
Heller Industries Inc.
For sure a lot of variables in this problem:
Engineering and Operations Management
Something I did not see addressed above, but might be in the published articles. We have adjusted our PCB silkscreen on our small part footprints (0603/0402)to remove the lines underneath the parts body. We found in some cases that thick soldermask and legend (UCL) acted like a teeter-totter and kept the component from contacting both paste "piles" thoroughly, supporting tombstoning. This might require careful testing to actually prove, or even cross-sectioning. Also, if the board utilizes Dry Film soldermask, this can be an even bigger concern based on it's thickness. Close optical inspection might also show this failure mode.Les Beller, Echostar Technologies, USA
In my experience, in terms of Pareto, I would say:Glayson Figueiredo, Philips Medical Systems
These are all great comments. One that hasn't been stated is the copper balancing on the component pads themselves. Copper is a great heat sink. When the copper entering the pads on each side of the component is significantly different, it affects the thermal balance.Cherie Litson, Litson1 Consulting
Here is a tip that has often worked for me; deliberately placing smaller chip caps and resistors (0805 and smaller) at about 30 degrees from perfect alignment usually reduces tombstoning. For the same reason that it is much more difficult to lift a rectangular box up against it's corner rather than against either end. So if the chips are placed at a slight angle such that two diagonally opposite corners are centered on each pad, the part first has to align itself before either end can be lifted by any uneven wetting tension on one end or the other.O. Stadheim, Viking Elektomek
This slight delay during alignment is often enough for wetting tension to approach equilibrium on both ends, reducing the tendency for either end to be pulled up. (Remember what I told you about engineering being nothing more than the calculated control of forces trying to reach equilibrium?) But for chip caps with slightly rounded corners, all bets are off!
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