VP of Advanced Technical Operations
Mark has over 25 years' experience in electronics fabrication, quality and reliability while working for IEC Electronics, GE, Motorola, ORS, etc. He has most recently established IEC Electronics Analysis and Testing Laboratories (IATL), LLC in Albuquerque, NM for electronics and material analysis testing in the military, medical, and industrial industries. His area of expertise includes PCB, PCBA, components, analytical and electrical analysis techniques.
Mark Northrup has submitted responses to the following questions.
Tarnished OSP Circuit Boards
The OSP(Organic Solderability Preservatives)Process consists of the following high level steps:
OSP Process Steps
Pad Missing ENIG Plating
If you apply OSP to the pads you have two different finishes, unacceptable by both IPC and customer drawing requirements ...
IPC SOIC Defect Question
The issue with "IPC SOIC Defect" relative to if solder touches the body of a Metal, Ceramic, or Plastic component ...
Contamination From Anti-static Foam
Your question involves two steps: Identifying the unknown contaminationRemoval of the unknown contaminationStep one will require FTIR if organic in ...
Solder Balling Splash After Reflow
Your "Solder Balling Splash After Reflow" description and associated pictures are a good start. But unfortunately, I need more information ...
Two Year Component Date Code Mandate
At IEC Electronics, also an electronics services manufacturer (CM), we too are routinely confronted with quality mandates on components purchased ...
What Is This Contamination?
The images from a failed position-sensor used in your power plant, appear to be potted or staked with some kind ...