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February 10, 2012
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March 3, 2010

When Should We Use Underfill?

We have a circuit board assembly with a wafer level chip scale package. The package is 2mm x 2mm with 20 solder balls (diameter 0.20 mm) and standoff is 0.16 mm.

Under what circumstances should we use underfill? What type of underfill material do you suggest?

T. S. Y.

Experts Comments

Wafer Level Packages (WLPs) should always be plasma treated (in order to improve underfill bonding, fluid flow and adhesion performance), and then underfilled in order to increase component reliability and lifetime—especially if the end product is a mobile product such as a cell phone, music player or other hand-held device.

If you need assistance in determining a suitable plasma treatment for your WLP application, Nordson MARCH can assist you. If you need advice in regard to underfill material dispensing, our sister companies Nordson ASYMTEK and Nordson EFD can be of service to you.

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Scott D. Szymanski
Global Marketing Manager
Nordson MARCH
Mr. Szymanski works to expand strategic alliances, strengthen partnerships with equipment suppliers, and develop future product offerings tailored to the semiconductor market.
NOTE: Mr. Szymanski is no longer working at Nordson MARCH

There are a couple of pieces of data required to answer this question. We have the size of the component, the number of balls and their size. What TSY has not supplied is the use environment for the device.

In theory you do not need any underfill, however if you want to sleep at night you might want to consider using underfill. Some of our customers are very sophisticated, and can model a circuit board, and the potential vibration / shock it will see.

From this they can determine which parts on the board require underfill. Then again we have some major customers who have determined that the risk is to great not to add an underfill process in their assembly.

There are also trade offs you can make. You can have a full capillary underfill, corner dots, edge bonds or no-flow underfills. Full capillary will give the most reliable product, then everything else is a trade off of cost for reliablity.

If edge bond allows you to meet the design requirements for reliablity then use this process. There are other trade offs you can make with regards to underfill.

I have seen data that suggest a really good board clean to remove all traces of flux prior to underfilling a part, can give you double the number the thermal cycles compared to no cleaning.

If you are looking for a couple of tests to determine the reliablity of your products. Try the Jedec Drop test, where a, board is dropped a maximum of 30 times or until 80% of the electrical joints go to a high resistance (JESD22-B111).
 
Another test that many manufactures ofcell phones use, is a Temperature Cycling Test. Jedec test JESD22-A104 will give the conditions of the test for different reliablity levels. However many cell phone manufactures use -40degc to 125degC, for 1000 to 2000 cycles.
 
For further reading:
"Qualification approaches and thermal cycle test results for CSP/BGA/FCBGA"
Reza Ghaffarian, Jet Propulsion Laboratory, California Institute of Technology, MS 125-152 4800, Oak Grove Drive, Pasadena, CA 911009, USA
 
It all depends if you want to sleep at night.
image
Steven Adamson
Market Specialist
Nordson ASYMTEK
Market Specialist for Nordson ASYMTEK. Mr. Adamson worked for Kodak, Motorola and Plessey, ICL in the UK with 5 US and 2 UK patents. He was awarded a HNC in electrical engineering and was 2008 President of IMAPS. Mr. Adamson was a respected mentor in the electronics industry. He passed away October, 2011. Learn about the Steve Adamson Memorial Annual Scholarship Fund.
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